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隨著工藝進(jìn)步，芯片上的線寬越來越窄，單位電阻也越來越大，而同時(shí)設(shè)計(jì)的復(fù)雜度也越來越高，芯片尺寸非但沒有減小還長(zhǎng)得更大了，以至于繞線越來密集，這對(duì)電源完整性提出了新的挑戰(zhàn)，維基百科上對(duì)電源完整性的定義是：Power integrity:?or PI is the analysis to check whether the desired voltage and current are met from source to destination. 對(duì)應(yīng)于數(shù)字實(shí)現(xiàn)就是 IR 跟 EM 的分析。
對(duì)于老工藝，IR 跟 EM 在設(shè)計(jì)末期去修干凈即可，但到了新工藝點(diǎn)，如果把 IR 跟 EM 留到最后再看，是在玩火，因?yàn)闃O可能修不掉需要重頭再來。所以亟需在實(shí)現(xiàn)早期就去考慮 PI, ?此處就需要了解一下 C 記的 IR-Aware 全家桶?—— Innovus + PVS?+ voltus + Tempus ——?從 IR-Aware Placement 到 IR-Aware CCOPT 到 reinforce_pg 到 Tempus ECO IR drop?fixing 到 PVS TBF-PG 到 Power Grid Optimization.??
"Power has to feed every transistor within a chip. That power is distributed around the chip using the metal layers. As fabrication technologies have become smaller, the size of the wires has also been getting smaller, while physical chip dimensions have stayed roughly the same. This means that wires have become thinner but have not gotten shorter. That leads to an increase in resistance per unit length. There is an almost 10X increase in resistance between a 28nm chip and a 7nm chip, and that will follow an exponential increase for smaller geometries. At the same time, the total power consumed by chip has also remained fairly flat.
As current flows through a resistor, the voltage drops – this is what is referred to as IR drop. When the voltage at a transistor drops, it becomes slower and this could impact the circuit timing. When this happens on a critical path through a design, it can also lead to a functional failure and thus needs to be avoided. Another trend in semiconductor design has been a reduction in operating voltage, meaning that small changes in supply voltage may represent an increasing percentage of the digital swing and potentially lead to incorrect logic values being seen.
A second problem is intertwined with IR drop: electromigration. When large currents flow through these thin wires, molecular displacement can happen. This means that molecules of the metal migrate along the wires over time, causing a further shrinking of the wire at certain points and thus an increase in the resistance. So, over time, electromigration can make IR drop worse. It thus becomes necessary to analyze for IR drop over the intended life off the device coupled with electromigration analysis.
IR drop, while causing an increase in delay for a digital transistor, can have an even bigger impact on analog circuitry.?Not only can timing change, but it can directly cause functional failures. Given that the current draw of a wire is influenced by activity in other areas of the chip, it is often seen as a source of noise for the analog circuitry and this has to be taken into account when doing circuit analysis."
參考文獻(xiàn)：https://support.cadence.com/apex/ArticleAttachmentPortal?id=a1O0V000009MqknUAC&pageName=ArticleContent&oMenu=People%20who%20viewed%20this%20also%20viewed
